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Transparencias de Arquitectura de Computadores


Author: Departament d'Arquitectura de Computadors, Facultat d'Informàtica de Barcelona (Universitat Politècnica de Catalunya)
Keywords: computer architecture; efficiency; reliability; amdahl; IA32; assembler; memory; cache memory; L1 cache; L2 cache; virtual memory; RAM; storage sistems; RAID; instruction set; addressing modes; RISC; CISC; segmentation; parallelism; processor; superscalar; VLIW
Language: Spanish
Collection: opensource

Description

Transparències de suport a l'assignatura d'Arquitectura de Computadors (2011) del Grau en Enginyeria Informàtica de la Facultat d'Informàtica de Barcelona (FIB). Aquestes transparències estan principalment en llengua castellana.



Transparencias de soporte a la asignatura de Arquitectura de Computadores (2011) del grado en Ingeniería Informática de la Facultat d'Informàtica de Barcelona (Universitat Politècnica de Catalunya.



Slides used during the Computer Architecture course teached at Barcelona's School of Informatics (Universitat Politècnica de Catalunya / BarcelonaTech). This slides are mostly in Spanish, although a few bits in Catalan are present.

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Identifier: TransparenciasDeArquitecturaDeComputadores
Mediatype: texts
Licenseurl: http://creativecommons.org/licenses/by-nc-sa/3.0/

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